1. Field of the Invention
Apparatuses and methods consistent with the present invention relate to a time-to-digital converter (TDC) and an all-digital phase-locked loop (ADPLL) using the same, and more particularly, to a time-to-digital converter capable of detecting not only a phase difference between two input signals, but also a frequency difference, and an all-digital phase-locked loop using the same.
2. Description of the Related Art
As technology has been developing, all-digital phase-locked loops (ADPLLs) have recently been explored as an alternative for charge-pump phase-locked loops (CPPLLs) to overcome the shortcomings of analog circuits in the advanced process technology. A time-to-digital converter (TDC) is a key component of ADPLLs, that is intended to perform an equal function as a phase-frequency detector (PFD) used in related art CPPLLs.
However, a related art TDC such as a delay-line based TDC, a stochastic TDC, a time-amplifying TDC, and a ring-oscillator based TDC behave only as a phase-detector (PD) due to its small pull-in range. In addition, such a PD can operate only when the difference between two frequencies is extremely small. The pull-in range for existing TDCs will be reduced as the loop bandwidth is decreased to reduce jitter.
To overcome this problem, some applications adopted a bang-bang PFD in place of a TDC to detect a phase. However, the phase-alignment accuracy of the bang-bang PFD is poor. Therefore, there is a need for a TDC capable of detecting both a phase error and a frequency error.